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Senior Place and Route Design Engineer

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Design Engineering
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155452 Requisition #
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Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, programmable SoCs and the ACAP, designed to deliver the most dynamic processor technology in the industry and enable adaptable, intelligent computing.

If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative and creative people to help deliver groundbreaking technologies that build an adaptable intelligent world. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.


Senior Place  & Route Design Engineer


Your responsibilities include but are not limited to: 

  • Block level place and route to design closure meeting timing, area and power constraints.
  • Create Block metal track plan including power grid.
  • Generate and Implement ECOs to fix timing, noise and EM IR violations.
  • Run Physical design verification flow at Block / full chip level and provide guidelines to fix LVS/DRC violations to COE owners
  • Participate in Methodology/flow development for blocks which include correct by construction designs
  • Exploring methodology improvements for better power, performance , area and overall productivity

     

Job Requirements:  

  1. Master’s/Bachelor’s degree in Electrical/Electronics engineering with 4-8 years of experience in semi-custom or PNR design
  2. Knowledge of and/or experience with industry standard PNR tools which include Synopsys ICC/ICC2, Cadence Innovus
  3. Knowledge of and/or experience with industry standard timing and physical verification tools such as PrimeTime and Calibre
  4. A good understanding of electrical, timing and reliability issues in deep sub micron circuit design.
  5. Strong debug skills
  6. Scripting experience using Perl, TCL, C-shell, Make and/or other scripting languages
  7. Knowledge and experience with basic Unix data management and job control
  8. Excellent written and oral communication skills

Education Requirements

Master’s/Bachelor’s degree in Electrical/Electronics engineering


Years of Experience

 

 4-8 years of experience in semi-custom or PNR design

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Equal Employment Statements

UNITED STATES: Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation. The information requested here is used only in compliance with US Federal laws and is not gathered for employment decisions. Responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.

CANADA and EUROPE: Xilinx is an equal opportunities employer.

SINGAPORE and AUSTRALIA: Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to age, race, gender, religion, marital status and family responsibilities, disability or sexual orientation.

CHINA, HONG KONG, KOREA, PHILIPPINES and TAIWAN: Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation.